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February 25, 2007

Final VLSI Assignment over

I have finally finished my 1.75CATS analog VLSI assignment which did take a fair bit of time. To be honest its been a good excercise of being given a toolkit to find a solution to a specified task. Turns out my silicon product will cost approx €28 (excl. overheads). Important lesson learnt are not to run metal under Resistor Diffusion.

Nathaniel Ho : 25 Feb 2007 19:29 | Tags: Engineering Technology Work | Comments (0) | Close comments | Report a problem

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